Computer Science and Electronic Engineering: Research and Design of FPGA and ASIC ChIP

Course 21: Computer Science and Electronic Engineering: Research and Design of FPGA and ASIC ChIP

I. Course Description

This course is a primary course in chip design. Using open-source tools, learn how to design, implement, simulate, and validate the ASIC chips. During the learning process, students will be exposed to many commonly used tools and technologies in the field of chip implementation. In the final project of this course, the students will produce a digital design.

The ability to identify, construct, and solve complex engineering problems by applying engineering, scientific, and mathematical principles. The ability to apply engineering design to develop solutions to specific needs, considering public health, safety and welfare, as well as global, cultural, social, environmental and economic factors. The ability to conduct appropriate experiments, analyze and interpret data, and use engineering judgment to draw conclusions.

II. Professor Introduction

William Nace – Professor at Carnegie Mellon University

William Nace Professor, a distinguished scholar in the field of computer science at Carnegie Mellon University, is not only the founder of the Teaching Committee of the School of Engineering, but also holds a number of key positions at the Institute of Information Networks, including a member of the Admission and Curriculum Committee. Professor Nace was awarded the Spira Award for Outstanding Education for his outstanding teaching contributions and led the ECE project evaluation to drive the forefront of computer science education. In software engineering, game design, artificial intelligence and other topics have profound attainments, especially in the computer hardware and distributed system research and development to show a unique research vision.

With the university of Washington master's degree in electronics and CMU PhD, Nace professor will have rich practical experience in teaching, a former air force lieutenant colonel and scientific research development Asia office chief scientist, after retirement continue to play in CMU waste heat, love hands-on practice, use advanced equipment to create, stimulate the students' innovation potential.

III. Syllabus

1. Background and overview of the chip design
2. Digital logic synthesis
3. The FPGA and PnR processes
4. 4.ASIC Tapeout Introduction
5. Simulation and test platform
6. The ASIC layout process
7. Static timing analysis
8. SoC- -the future direction of FPGA
9. The alternative hardware description language
10. Form verification